Modern electronic devices utilize semiconductor chips, commonly referred to as "integrated circuits" which incorporate numerous electronic elements. These chips are mounted on substrates which physically support the chips and electrically interconnect each chip with other elements of the circuit. The substrate may be a part of a discrete chip package used to interconnect a single chip to external circuits. In a so-called "hybrid circuit"0 or "module", one or more chips are mounted directly to a substrate forming a circuit panel arranged to interconnect the chips and the other circuit elements mounted to the substrate. In either case, the chip must be securely held on the substrate and must be provided with reliable electrical interconnection to the substrate.
The structures utilized to provide the connection between the chip and the substrate must accommodate all of the required external electrical interconnections to the chip. Advanced chips may require hundreds of I/O connections. Structures connecting a chip to a substrate ordinarily are subject to substantial strains caused by thermal cycling as temperatures within the device change during operation. The chip and substrate ordinarily expand and contract by different amounts. This causes the electrical contacts on the chip to move relative to the electrical contact pads on the substrate, thus deforming the electrical interconnections between the chip and substrate and places them under mechanical stress. These repeated stresses can cause breakage of the electrical interconnections. The cost and size of the chip and substrate assembly are also major concerns. Moreover, there should be a convenient way to test the chip and the interconnections before assembling it to the substrate, and a convenient way to salvage chips if the interconnections are faulty. All these concerns, taken together, have presented a formidable engineering challenge.
It has recently been proposed to solve these problems by providing a sheet-like, preferably flexible interposer top layer with electrical terminals thereon. This flexible layer is mounted over the face of the a chip, desirably with a soft, compliant material disposed beneath the terminals and, typically, beneath the top layer. The terminals are electrically connected to contact pads on the chip, as by flexible leads. The terminals can be engaged with or bonded to contact pads on a substrate so as to connect the chip to the substrate. Because the terminals are moveable with respect to the contacts on the chip in directions parallel to the face of the chip, the assembly compensates for thermal expansion. Also, because the terminals are compliant or moveable in the vertical directions normal to the face of the chip, the terminals can be readily engaged with a test probe subassembly before assembly to the substrate. Thus, the subassembly can be tested prior to assembly to the substrate. As disclosed, for example in commonly assigned U.S. Pat. No. 5,148,265 and in International Publication WO 92/05582, performed connection component may include a flexible top layer and may also include a compliant bottom layer. Such component is then assembled atop the chip surface and connected as described above. The same publications also mention the possibility of providing a compliant layer formed separately from the top layer and having adhesives thereon so that the compliant layer may be prepositioned on the chip surface before the top layer is applied thereon. As also disclosed in these publications, it is possible to form the compliant layer from a partially cured elastomer which is fully cured after assembly of the top layer, so that the compliant layer itself adheres to the chip and to the top layer to bond the same together.
As further disclosed in co-pending, commonly assigned U.S. patent application Ser. 07/919,772, of Jul. 24, 1992, and in co-pending commonly assigned International Patent Application PCT US 93/069,930, the disclosures of which are hereby incorporated by reference herein, a connection component may include a support structure and leads extending across gaps in the support structure. The support structure may include, for example, a sheetlike flexible top layer as discussed above as well as a compliant bottom layer. The entire structure is positioned on the chip, with the leads substantially aligned to the contact pads of the chip. A part of each lead extending across the chip is then engaged by a bonding tool and forced downwardly into engagement with the contact pad. Typically, one end of each lead is detached from the support structure during this process.
In these processes, it is desirable to exclude air from between the various layers of the connection component and the support structure. The chip and substrate normally are encapsulated by potting or similar processes in which a flowable encapsulant encases the assembly and then hardens to form a permanent structure. Trapped air can expand during temperature changes in the encapsulation process or in subsequent operation of the device, and can damage the assembly. Moreover, trapped air can cause a breach in the seal provided by the encapsulant.
One approach which eliminates any possibility of trapped air between the layers of the support structure and between the support structure and the chip is to form the bottom or compliant layer of the support structure in situ from a liquid material introduced between the top layer of the support structure and the chip. Such an approach is disclosed, for example, in the preferred embodiments of commonly assigned, copending U.S. patent application Ser. No. 08/123,882, filed Sep. 20, 1993. The flexible top layer and leads may be positioned above the chip and, before or after bonding the leads to the chip, the liquid material may be introduced between the top layer and chip. The liquid material subsequently is cured to form a compliant layer beneath the top layer. This approach substantially eliminates the possibility of air entrapment. Because a liquid material must be handled and placed into each assembly, this approach imposes some constraints on the production process. Further improvement therefore would be desirable.
In semiconductor connection components and processes as discussed above, air can also be trapped in the vicinity of the leads, particularly where the leads extend on the underside of the top layer, between the top layer and the compliant layer. This may occur occasionally even where the compliant layer is formed from air curable liquid material cured in contact with the top layer. Accordingly, still further improvements directed towards elimination of such air entrapment would be desirable.